Puzzler 15

The answer is d.

Energy stored in a capacitor changes by square of the terminal voltage. A capacitor has 4 times higher energy stored in it if the terminal voltage is doubled.

The relationship between energy stored in a capacitor and its terminal voltage is given by the following equation:

E Energy stored in joule
C Capacitor value in farad
V Capacitor terminal voltage in volt

c 2.5 µF / W

Specification of a typical universal input power supply demands satisfactory operation over an input voltage range of 90 to 265 VAC. To ensure trouble free operation during supply voltage sags, which may last from 8 ms to 50 ms, some equipment manufacturers reduce the lower limit to 85 VAC.

The input DC bus capacitor supports the operation of the power supply by storing energy during the peak of the input sinusoid and supplying the stored energy to the converter circuit during interval td. (See figure.2)

Figure 2. Capacitive filter for full wave rectifier

Calculation of the capacitor value can be made using the equation:

Po = Converter output power
? = Converter efficiency
td = Capacitor discharge interval
Vpk = Minimum peak voltage seen by the power supply at low line
Vmin = Minimum DC voltage for satisfactory operation

The set of curves in Figure 3 show the result of calculation graphically, for different converter efficiencies and choice of minimum DC bus voltage.

Figure 3. Capacitor selection curves for 47Hz frequency universal input application. (a) No hold up requirement, (b) 4ms hold up requirement and (c) hold up of one half cycle of supply frequency)

Figure 4. Relative comparison of required capacitor value for 47Hz and 50Hz operation. Notice the slight reduction for a 50Hz only design

A robust design made for worst-case operation would be able to operate satisfactorily for a voltage as low as 85 VAC, line frequency as low as 47 Hz, worst case bulk capacitor, minimum device current limit, minimum primary inductance and minimum switching frequency.

Statistically the probability of these 6 independent variables being at their absolute worst-case values is low. In practice for most applications it is sufficient to design for minimum AC input voltage, typical capacitor values, typical line frequency (50 Hz) minimum current limit, switching frequency (or I²f for PI products) and primary inductance.

For this example, since the efficiency of the converter is 75% and the converter is designed to operate for a 75 V bus voltage, 2.5 µF / W minimum is required. Higher values would allow operation to a lower voltage or provide hold up time at the expense of larger and higher cost capacitors.

For a power supply with a pi-filter as shown in Figure.1, the capacitor value calculated can be split in two capacitors.

In a flyback converter the energy is first stored in the inductor during the on time of the primary switch and is then delivered to the load during the switch off time. When the AC input fails, the bus voltage falls, reducing the voltage applied across the primary inductance during the switch on time. This reduces the di/dt, requiring a longer on-time to reach peak current.

In a typical converter at some bus voltage the on-time needed to reach current limit is greater than allowed by the maximum duty cycle limit. Once this point is reached the peak inductor current reduces as the bus voltage continues to fall. In effect duty cycle and not peak current now limits the power delivered to the load.

With duty-cycle extension the switch on time is not limited, allowing current limit to be reached regardless of the bus voltage. This maximizes energy transfer from the bulk capacitor to the load. For a given bulk capacitor value this provides a longer hold-up time compared to a power supply with no duty cycle extension.

Most microprocessor-based circuits need power supplies that have adequate hold-up time for multiple reasons:

1. To enable uninterrupted operation during sub cycle supply line disturbances.
2. Microprocessor based applications often need several milliseconds to store critical data to NVRAM or EEPROM memories once a "supply-fail" condition is detected. Output regulation should be maintained to ensure graceful shutdown with no loss of data.

Microprocessor based circuits can reduce power consumption by disabling non-critical loads once input supply failure is detected. For a reduced power level, Flyback converters with on time extension can maintain regulation at the output to a significantly lower DC bus voltage. With the ability to maximize energy transfer to the load the on time extension feature enables the use of lower input capacitor values while still providing adequate holdup time.

Figure 5. Relation between DC Bus Voltage drop and power delivery capability of Flyback power supplies with and without on time extension. At 60% load regulation is lost at 77 V (a) without on-time extension and 43 V (b) with on-time extension.

Figure. 3 shows that with on time extension a power supply designed to operate with a minimum DC bus voltage of 100 V can deliver up to 60% of its rated load for a DC bus voltage as low as 43 V. A conventional Flyback converter under the same conditions but without on-time extension will fall out of regulation as soon as DC bus voltage drops below 77 V.

This explains why converters with on time extension provide longer hold up time as compared to fixed frequency solutions especially for reduced load levels without any additional changes in the design.

Figure 4 shows an example of improvement in hold-up time of the 12 V, 1 A power supply show in figure 1 operating at full load due to use of on time extension.

Figure 6. Improvement in hold up time with on time extension